SYMPOSIUM P

11:00 AM *P4-S2.1 (invited)
Materials and Processing Directions for HKMG. (#1220) Stephen M Rossnagel, IBM Research, Yorktown Heights, New York, USA.

The high-k metal gate (hkmg) field has sampled much of the periodic table in the past few years to identify candidates for the replacement of conventional gate structures for 45nm and following generations. The materials set has mostly solidified for the gate dielectric (some variation of HfOx), but the metal choices for nfet and pfet remain unclear as do the steps to set the appropriate electrical parameters. From a manufacturing point-of-view, integration and processing capabilities place major limitations on the choice of metals and how they are deposited. While there has traditionally been a strong bias against sputter deposition for metal gates (or dielectrics) and in favor of ALD, the pervasiveness of magnetron sputtering tools at 300mm and the lack of alternative metal systems at 300mm, such as ALD or CVD, has led several companies to integrate a mostly-PVD solution. This presentation explores the relevant materials and processing options for hkmg manufacturing applications for both dielectrics and metals and describes the current state of 300mm tools, including the fundamental limitations on materials choices.

11:30 AM *P4-S2.2 (invited)
Gate Dielectrics with High K, High Eg, and Stability in Contact with III-V Semiconductors. (#1326) Darrell G Schlom¹, Josh Panfile¹, Tassilo Heeg¹, Carolina Adamo¹, Maitri Warusawithana¹, N Goel², S Koveshnikov², P Majhi², W Tsai², C M Garner², D H Choi³, J S Harris³, Y Nishi³, V Tokranov⁴, M Yakimov⁴, R Kambhampati⁴, S Oktyabrsky⁴, Y Sun⁵, P Pianetta⁵, H Wen⁶, C Gaspe⁶, J C Keay⁶, M B Santos⁶, L V Goncharova⁷, E Garfunkel⁷, T Gustafsson⁷; ¹Department of Physics and Materials Science and Engineering, The Pennsylvania State University, USA ; ²Intel Corporation, USA ; ³Center for Integrated Systems, USA ; ⁴University at Albany, State University of New York (SUNY), USA ; ⁵Stanford University, California, USA ; ⁶The University of Oklahoma, USA ; ⁷Rutgers University, New Jersey, USA.

This talk will give an overview of our work to identify viable high dielectric constant (K) gate dielectrics for III-V MOSFETs. As a first step in the identification of such gate dielectrics, we used tabulated thermodynamic data to comprehensively assess the thermodynamic stability of binary oxides in contact with AlAs, AlP, AlSb, GaAs, GaP, GaSb, InAs, InP, and InSb at temperatures from 300 to 1200 K. Although there is insufficient thermodynamic data to complete the analysis and determine which binary oxides are definitely stable in contact with particular III-V semiconductors, the data are sufficient to show that many binary oxides are unstable in contact with these materials. The result is a set of binary oxides that may be stable with each of these compound semiconductors. The set is most restrictive for Al-containing compounds and least restrictive for In-containing compounds. In contrast, changing the group-V species has little effect on which binary oxides may be stable in contact with the III-V material. Interestingly, the same set of binary oxides that thermodynamic analysis reveals may be stable in direct contact with silicon are the same ones that may be stable in contact with all of these III-V compound semiconductors. This greatly simplifies the search for suitable high K dielectrics for III-V compound semiconductors--those found to be stable in contact with silicon should also be stable with all of these III-V materials. Using molecular-beam deposition, we have deposited amorphous LaAlO₃ on GaAs, InGaAs, and Si-capped GaAs in a low temperature / excess oxidant regime. In this regime the oxidation of the semiconductor is limited by kinetics. The samples were protected from oxidation during ex situ transfer from the III-V MBEs in which they were grown to the oxide MBE in which the high K overlayer was grown by capping them with arsenic prior to air exposure and subsequently desorbing this arsenic cap in UHV immediately prior to the deposition of the high K film. A two-step low-temperature anneal has led to promising C-V characteristics of the resulting MOS capacitors. Structural, chemical, and electrical characterization of the resulting MOS capacitor structures, including band-offsets, will be presented.

12:00 PM P4-S2.3
Metal Work-Function Tunability and Interfacial Reaction with Underlying High-K Layer of Peald TaC_xN_y Films. (#1038) Tae Joo Park, Jeong Hwan Kim, Jae Hyuck Jang, Kwang Duk Na, Cheol Seong Hwang; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, Seoul National University, Republic of Korea.

The authors recently reported that TaCxNy films grown by a plasma-enhanced atomic layer deposition (PEALD) technique show a quite low resistivity, chemical inertness, and thermal stability including superior aging characteristics. The adoption of Ar/H2 plasma as a reducing agent instead of H2 plasma increased the contents of TaCx and metallic TaN, which results in a lower resistivity and superior aging characteristics. It is necessary to obtain an enough tunability of gate metal work function without a serious process complexity for the complementary MOSFETs applications. It is also important to understand the possible interfacial reactions at the interface between the gate metal and high-k dielectrics during the deposition of gate metal and PDA. In this study, the MOS capacitors with metal gate/high-k stack were fabricated using PEALD TaCxNy films with H2 plasma or Ar/H2 plasma, and thermal ALD HfO2 films. The characteristics of the TaCxNy/HfO2/Si are compared with those of the TaCxNy/SiO2/Si capacitors through various analyses. The work-function tunabilty of TaCxNy films with the process variations (alternating reducing agent) and the interfacial reactions with underlying high-k HfO2 films were focused. HfO2 films were grown to a thickness of ~5 nm on a Si substrate and thermally oxidized SiO2/Si substrates with the various SiO2 thicknesses. TaCxNy films were deposited on HfO2/Si, SiO2/Si and HfO2/SiO2/Si substrates with the various thickness of SiO2 layer in order to investigate the work-function of TaCxNy films. TaCxNy films were deposited by a PEALD technique using Ta(N-t-C5H11)[N(CH3)2]3 as the precursor and plasma-activated H2 or Ar/H2 gas as the reducing agent. PDA of the films was performed using RTA at 1000 ?C. The chemical binding structures of the TaCxNy films were examined by XPS. The microstructures and thicknesses of the various TaCxNy films were observed by cross-section high-resolution transmission electron microscopy. The physical densities of the various TaCxNy films were examined by X-ray reflectivity. The interfacial oxidation and reaction of TaCxNy films with H2 plasma are more serious than those of TaCxNy films with Ar/H2 plasma which resulted in a smaller capacitance. However, the plasma damage induced by massive Ar+ bombardment increases interface state density. The work-function of TaCxNy film with H2 plasma and Ar/H2 plasma was ~5.4~5.5 and ~4.9 eV, respectively. Detailed experimental data on the film characteristics will be reported in the presentation. a)electronic mail : juju31@snu.ac.kr

12:15 PM P4-S2.4
Epitaxial Ta₂O₅ and Ta₂O Films Produced by Low Pressure Thermal Oxidation of Epitaxial Tantalum Films on Sapphire Substrates.. (#927) S Gnanarajan, S. K. H. Lam; Australian Commonwealth Scientific and Research Organization (CSIRO) Materials Science and Engineering, Australia.

Tantalum pentoxide (Ta2O5) films have been extensively studied for possible application as a dielectric insulator in capacitors and micro-electronic devices. The techniques to obtain Ta2O5 films include anodic and thermal oxidation of Ta layers, sputtering and chemical vapour deposition.1 Ta2O5 films are of polycrystalline or amorphous structure depending on their deposition conditions. The polycrystalline films generally reported have either orthorhombic or hexagonal structure. However, there are no reports on epitaxial tantalum pentoxide. We have produced epitaxial Ta2O5 and Ta2O films by low pressure thermal oxidation of epitaxial Ta films on a sapphire substrate. Thin epitaxial Ta films were deposited using magnetron sputtering on sapphire substrates at high temperature. Thermal oxidation of these films in oxygen at a pressure of 1.0 Pa at a temperature of 700oC produced epitaxial Ta2O films with oxidation time of few minutes and further oxidation produced Ta2O5 layers on top of Ta2O films as determined by x-ray diffraction techniques. The epitaxial Ta2O films had a cubic structure with (101) plane oriented in the substrate plane. The Ta2O films are transparent conducting oxide and have a band gap of about 2.16 eV. The epitaxial Ta2O5 films had a twinned orthorhombic structure.

LUNCH 12:30 PM - 2:00 PM

2:00 PM *P4-S3.1 (invited)
Point Defects and Dielectric Response at Si:HfO₂ Interfaces through First Principles Computations. (#734) Rampi Ramprasad, University of Connecticut, USA.

Driven by a need for device miniaturization in the microelectronic industry, high-permittivity materials have gained interest as potential substitutes for conventional low permittivity SiO2 dielectrics. Although Hf based dielectrics appear to show the most promise, and are actively being considered by the electronics industry, challenges remain, related to the long term stability of interfaces, and their dielectric properties. In this talk, first principles density functional calculations on Si-HfO2 heterostructure systems will be presented [1,2]. The position-dependent dielectric permittivity profiles determined using a recently developed theory of local permittivity that specifically addresses the role played by interfaces in altering the dielectric constant [1] will be discussed. Changes of the interface physical structure due to the kinetic instability of the interfaces in the presence of point defects, and their impact on the dielectric properties will also be explicitly considered [3,4]. [1]. N. Shi and R. Ramprasad, Phys. Rev. B 74, 045318 (2006). [2]. N. Shi and R. Ramprasad, IEEE Trans. Dielectrics and Electrical Insulation, in print. [3]. C. Tang and R. Ramprasad, Phys. Rev. B 75, 241302 (2007). [4]. C. Tang and R. Ramprasad, Phys. Rev. B 76, 073306 (2007).

2:30 PM P4-S3.2
A Synchrotron Investigation of the Electronic Structure of Lanthanide Zirconates. (#817) Richard James Clements¹, Brendan Kennedy¹, Chris Ling², Anton P.J. Stampfl³; ¹The University of Sydney and ANSTO, Australia ; ²The University of Sydney and Bragg Institute, ANSTO, Australia ; ³The University of Sydney, and Bragg Institute, ANSTO, Australia.

The lanthanide zirconates are of interest for potential use in inert matrix fuels and nuclear wasteforms. To determine the suitability of a material as an inert matrix or wasteform, the material's structure must be resistant to radiation damage and its thermal, thermodynamic and mechanical properties must be known. The structure's ability to incorporate an actinide host into the lattice vacancy must also be known. These properties may be better understood by investigating the f-electronic structure, which has proved difficult to model. We have undertaken a synthesis of the full range of lanthanide zirconate series using solid state techniques. We have performed the following measurements on a selection of the series using synchrotron radiation: powder X-ray diffraction, VUV photoluminescence spectra, X-ray photoemission spectroscopy (XPS) and near edge X-ray absorption spectroscopy (NEXAFS). These results will be presented, along with details of the analysis and synthetic techniques used.

2:45 PM P4-S3.3
The Electronic Structure of ZrO₂/Si(111). (#1084) Anton Patrick Joseph Stampfl¹, Julie Lynette Murison¹, Peter Evans¹, Gerry Triani¹, Tun-Wen Pi²; ¹Australian Nuclear Science and Technology Organisation, Australia ; ²National Synchrotron Radiation Center, Taiwan.

Zirconium and some of its alloys, oxides and nitrides are known for their anti-corrosive and excellent wear resistant character. For this reason the nuclear industry uses Zr-based materials due to their low neutron absorption character, mechanical strength, toughness and ability to withstand harsh environmental conditions such as high temperatures and intense radiation. ZrO2 has also been singled-out as a candidate material for inert matrix fuels to be used in Generation IV nuclear reactors. The formation of ZrO2 under different growth conditions leads to variations in electronic properties and crystal structure. Control of growth will enable tuning the electronic and structural properties of this material for specific applications. The current preliminary study investigates the effect of deposition conditions on the electronic and crystal structure of ALD grown ZrO2 films on silicon, using synchrotron-based high resolution photoemission, TEM, SIMS and glancing angle x-ray diffraction. The precursors used in the deposition were ZrCl4 and H2O using two growth temperatures of 200?C and 300?C. In addition, ZrO2 films were subjected to rapid thermal annealing at 600?C to investigate their valence electronic structure on crystallization. We relate our results to the detailed electronic structure of ZrO2 thin films and bulk material.

3:00 PM P4-S3.4
The Effect of Deposition and Processing Conditions on the Optical Properties of Sputter-Deposited Hafnium Oxide Thin Films. (#1401) N.S. Muhammad, K.B. Belay, D.J. Llewellyn, Robert G. Elliman, Avi Shalav; Electronic Materials Engineering Department, Research School of Physical Sciences and Engineering, The Australian National University, Australian Capital Territory, Australia.

Hafnium oxide films are of interest as a replacement for silicon dioxide in future microelectronic devices due to their high dielectric constant (high-k) and are used as dielectric coatings or dielectric mirrors in many optical applications due to their high refractive index (n > 2) and low optical loss. These properties make hafnium oxide a potential candidate for the fabrication of integrated planar waveguide devices or structures that combine electronic and photonic functionality on a single chip. In this study we examined the effects of deposition and processing conditions on the refractive indices and extinction coefficients of hafnium oxide, with particular emphasis on HfO₂ and Hf-silicates (i.e. Hf_xSi_1-xO₂). The latter are of particular interest as a means of increasing the crystallisation temperature of pure HfO₂ which is known to crystallize at temperature in the range 400 - 600°C. Films of HfO₂ and HfO₂/SiO₂ with thicknesses in the range 100 - 500nm were deposited onto (100) silicon substrates and fused silica slides by sputter deposition. Samples were subsequently annealed in the temperature range from 200 to 1000°C. Physical characterisation of the films was undertaken with Rutherford backscattering spectrometry (RBS), x-ray diffraction (XRD) and both plan-view and cross-sectional transmission electron microscopy (TEM). Optical characterization was performed using a CARY 5000 spectrophotometer and a FilmTec reflectometer. SCOUT1 thin film modelling software was used to model the measured reflectance (R) and transmittance (T) of the pure SiO₂ and HfO₂ as well as co-sputtered samples. The thickness of the films was also calculated and compared with AlphaStep 200 step-height measurements. SCOUT database optical constants were used for the pure SiO₂ and HfO₂ film and calculated values for R and T and resulting thickness calculations agreed with experimental data. The co-sputtered samples of different SiO₂/HfO₂ ratios were modelled based on the Bruggeman effective medium model. It is shown that this model accurately describes the optical properties of SiO₂/HfO₂ composites. Refractive indeces (n) and the extinction coefficients (k) are reported for different film compositions and annealing temperatures and correlated with changes in film microstructure.

AFTERNOON BREAK 3:30 PM - 4:00 PM

4:00 PM *P4-S4.1 (invited)
Chemical Stability of Metal Oxide/Ge and Metal Oxide/III-V Interfaces and Implications for Low Defect Density MOS Devices. (#1148) Paul C. McIntyre, Yasuhiro Oshima, Byungha Shin, Eunji Kim, Shankar Swaminathan, Krishna C. Saraswat; Stanford University, California, USA.

The need to achieve high performance in MOS transistors as they scale to their ultimate size limits prompts interest in channel materials, such as Ge and III-V compound semiconductors, which exhibit larger intrinsic carrier mobilities than Si. Simultaneously, the requirement for low device off-current produces a need to reduce gate leakage current density while maintaining electrostatic control of the transistor channel. Therefore, optimized deposition of high-k gate dielectrics onto these novel channel materials is subject of growing practical interest. There are also substantial differences in the surface oxidation behavior of Si, Ge and III-V channels that prompt more fundamental interest in such research. Unlike silicon, high mobility channel materials do not form a highly-stable and stoichiometric native oxide; therefore, control of the state of oxidation at the metal oxide dielectric/channel interface during and after gate dielectric deposition is essential. This presentation will summarize findings reported to date on 1) chemical stability of Ge and III-V surfaces in the presence of oxygen and 2) oxide/channel defect formation and passivation. New results on pre-high-k chemical surface preparation, structural modification during metal oxide deposition and the resulting effects on MOS capacitor and transistor characteristics will also be presented, with emphasis on ALD-grown aluminum oxide and hafnium oxide gate insulators and on Ge and InGaAs channels. In situ and ex situ monitoring of chemical bonding at the gate insulator/channel interface by photoelectron spectroscopy will be correlated with the Dit, fixed charge and charge trapping behavior of MOS devices.

4:30 PM *P4-S4.2 (invited)
High Dielectric Constant Film - Interface Studies. (#177) Eugene A. Irene, Department of Chemistry, University of North Carolina, Chapel Hill, USA.

Since the 1990's and as a result of MOSFET dimension down-scaling there has been a relentless quest for a replacement dielectric for SiO2 as the gate dielectric. This quest has resulted in the emergence of several candidate dielectrics that have a higher static dielectric constant (K) than the 3.9 for SiO2. The higher ? in turn permits a thicker dielectric film to be used and thereby reduces leakage via tunneling and improves reliability overall. However, all the candidate replacement dielectrics are reactive with Si and yield a complex interface in the channel region of the MOSFET's. The nature of this interface with several candidate high K dielectrics with Si is studied using in situ and real- time techniques including mass spectrometry of recoiled ions and spectroscopic ellipsometry. These studies have led lead to the interface structure that has been correlated with a variety of interfacial electronic measurements. Emerging is a more complete picture of the effect of film-substrate materials interactions upon interfacial electronic properties and device performance. This paper commences with a brief discussion of the rationale for the quest for high K dielectric films and then the results both materials and electronics are presented from nearly identical preparation and characterizations on several candidate high K films on Si and SiO2 covered Si substrates including barium strontium titanate, strontium titanate, hafnium dioxide, zirconium dioxide and magnesium oxide. It is shown that the highest electronic quality interfaces are found for magnesium oxide as a result of a minimum of film-substrate interaction.

5:00 PM *P4-S4.3 (invited)
TaC_xN_y Metal Gate and HfO₂ Dielectrics Grown by Atomic Layer Deposition for Advanced Gate Stacks. (#1041) Cheol Seong Hwang, Tae Joo Park, Jeong Hwan Kim, Jae Hyuck Jang, Minha Seo, Kwang Duk Na, Mi Young Kim; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, Seoul National University, Republic of Korea.

In order to fabricate the metal gate/high-k gate stack for the advanced CMOSFETs, TaCxNy metal and HfO2 dielectric films were grown by the plasma-enhanced atomic layer deposition (PEALD) and thermal ALD, respectively. The influences of the SiO2 interface layer with the Si substrate and various metal capping (Hf, Zr, Ti) on the HfO2 films are investigated. TaCxNy films were grown by using Ta(N-t-C5H11)[N(CH3)2]3 as the precursor and H2 or Ar/H2 plasma as the reducing agent. The Ar/H2 plasma appeared to break efficiently the Ta-N bonding in the Ta precursor and form more TaCx and metallic TaN, which resulted in the films with a lower resistivity. The H2/Ar plasma also made the films denser and eliminated efficiently the oxygen in the films. The superior resistances against the elemental diffusions and aging characteristics were also achieved. A sputtered ultra-thin Hf metal layer was deposited on the ALD HfO2 films. The HfO2 layer which formed by the oxidation of Hf metal was effective in decreasing the grain-boundary density of underlying crystallized HfO2 film and reduced the excessive oxygen concentration in ALD HfO2 films. This eventually reduced the increase in capacitance equivalent thickness (CET) and high-k characteristics in the CET vs. leakage current density curve even after post deposition annealing at 1000oC. The influences of thick (1.4nm) and thin (0.6nm) SiO2 interfacial layer (IL) intentionally grown by O3 on the thermal stability and chemical structure of HfO2 films were investigated. The HfO2/thick-IL stack maintained a good thermal stability up to the PDA temperature of 1000? because the IL growth was suppressed, and Hf-silicate formation was accompanied by the consumption of the SiO2 IL during PDA. On the other hand, the HfO2/thin-IL layer stack showed an inferior stability because Hf-silicate was formed by enhanced Si diffusion from the Si substrate and the IL grew during PDA. Finally, the influences of precursor chemistry on the growth and crystallization characteristics of ALD HfO2 films were investigated. An asymmetric Hf precursor - Hf[N(CH3)(C2H5)]3[OC(CH3)3] - was compared with its symmetric counterpart - Hf[N(CH3)(C2H5)]4 - when the O3 was used as the oxidant. The asymmetric structure of the precursor largely improved the growth rate and film density. The higher density of the film also improved the anti-crystallization property of the film and the amorphous structure was retained up to ~ 15 nm during the deposition at 300oC. This highly enhanced thermal stability of the electrical performance. electronic mail : cheolsh@snu.ac.kr

P4-S5.1
Resistance Switching Behaviors and Their Characteristics of Metal-HfO₂-Metal Resistors. (#657) Jinho Ahn, Seungki Yoon, In-Sung Park; Department of Materials Science and Engineering, Hanyang University, Republic of Korea.

The mobile devices require a new-type nonvolatile memory with lower power consumption, larger memory density, and higher speed. To meet all these critical requirements much attention has been paid to the resistance switching behaviors of various types of resistors for resistive RAM (ReRAM). Even though the fabrication processes of resistor element in ReRAM with metal-insulator-metal (MIM) structure are simple, their resistance switching behaviors are strongly dependent on the material and fabrication conditions of the metal electrodes and the insulator. It should be also compatible with the conventional semiconductor processes using familiar materials such as non-noble metal and binary metal oxide. In this work, the resistance switching behaviors of metal-HfO₂-metal resistors are discussed with insulating HfO₂ films and the electrodes. To make MIM resistors, the metal electrodes of Mo and Ru were deposited using a sputtering system at room temperature and HfO₂ films were grown using atomic layer deposition (ALD) technique. The thickness, temperature, and oxidant of HfO₂ films were varied during deposition to get the insulators with different qualities. Several electrode systems were prepared with the same or different top and bottom electrode. The current measurements were done in voltage sweep mode with current compliance at room temperature using an Agilent HP4155A semiconductor parameter analyzer. Effect of growth conditions for insulator films on the resistance switching behaviors was investigated. It was found that the HfO₂ films above 10 nm thick could lead to the resistance switching between high and low resistance states. The deposition temperature of HfO₂ films also affected the characteristic operation voltages such as reset and set voltages. The oxidant type during ALD process was another factor to induce the resistance switching behavior. The device system with the same top and bottom electrodes showed symmetric I-V characteristics for the positive and negative voltage polarities. However, asymmetric current behaviors with voltage polarity were found in the different top and bottom electrode systems. It is suggested that the anodic electrode is more dominant factor at the high resistance state.

P4-S5.2
Dielectric Characterization of Barium Titanate (BaTiO₃) Ceramics Having Bimodal Distribution Morphology. (#1206) Subhash B. Deshpande, H.S. Potdar, Y.B. Khollam; Physical & Materials Chemistry Division, National Chemical Laboratory, Pune, India.

Equimolar quantities of AR grade BaCO₃ and TiO₂ were ball milled for longer periods of 10 hours and subsequently calcined at 1150°C/6h in air to get monophasic cubic BaTiO₃ powders. The pressed disks when sintered at 1400°C/4h in air produced 95-96% dense ceramics with tetragonal symmetry (c/a = 1.0065). The sintered and electroded samples as usual showed ε_RT ~ 1500 with tan δ ~ 1.5%. However, these samples exhibited exceptionally very high values of ε_max~10500 (ratio ε_max/ε_RT ~ 7.0) at a Tc ~126°C. Usually, ε_max of ≤8000 is observed for the BaTiO₃ samples prepared by solid-state reaction route. The DC resistivity, ρ,was found to be in the range of 10⁹- 10¹⁰ Ω- cm for these samples. These samples also exhibited a very high value for the spontaneous polarization, P_s ~ 12.0 μC/cm² with E_c ~ 2.5 kV/cm. Further, very high breakdown voltages (E_b ~ 50.0 kV/cm) were estimated for these BT samples. The origin of very high values for ε_max, P_s and E_b is sought in the thorough mixing during earlier stages and the bimodal distribution morphology (SEM studies) formed during the calcination cycles. This resulted in highly dense BT ceramics thereby leading to excellent electrical properties. All these interesting results are discussed in this paper.

P4-S5.3
Variation of Internal and External Fringing Capacitance of Nano Scale SOI Devices with Influence of Different High-K Dielectrics. (#1087) Amir Jahanshahi, Seied Manoochehr Hoseini Pilangorgi, Mahdi Moradinasab, Behjat Forouzandeh; University of Tehran, Iran.

Because of its lower short channel effects, fully depleted (FD) silicon on insulator (SOI) devices seem to be the chosen devices which are compatible with scaling of technology. There is an unlimited desire to have narrower SiO2 as gate oxide. GIDL is a problem that arises with thin oxides, so technology is moving towards high-k gate dielectrics. Some modeling of fringe capacitance has been presented up to now. Modeling of external fringing capacitance has been presented by Roy [1] and Kuo [2], and only a rough modeling of internal fringe capacitance is presented by Kumar [3]. By starting the trend of high-k dielec-trics as the gate oxide, internal fringe capacitance has become a main challenge in scaling the technology. The effect of internal and external fringing capacitance together is not investigated up to now. Fringing electrical fields are between gate and S/D. Positive gate voltage induces a posi-tive voltage in S/D. This voltage induces a positive shift in surface potential and de-creases the barrier, in which reduces threshold voltage. External fringing fields are placed in the spacer region, while internal fringing fields are placed in the gate oxide region. Having a thin oxide means less internal fringing fields because less electrical fields have chance to close their route from gate to S/D. Unfortunately by using high-k gate dielec-trics there will be more internal fringing fields which means bigger internal fringing ca-pacitance. As the gate dielectric permittivity constant increases external fringing capacitance de-creases because of bigger distance between gate and S/D, while internal fringe capaci-tance increases because of more fringing fields in the oxide region. By the aid of an ana-lytical modeling and verifying with simulation in TCAD we have shown that FIBL has a decreasing trend by using higher dielectric constants up to an optimum constant, in which fringe capacitance is in its minimum value. Our analytical modeling is based on a conformal mapping between gate and S/D. There is a trade off between the underlap length and channel resistivity or between FIBL and Ion/Ioff. We have shown, by choosing a proper underlap extension, FIBL can be mini-mized with a specific high-k dielectric constant and a specific gate length. [1] K.Roy, et al, IEEE Trans. Electron Dev, vol.52, no.2, pp. 256- 262, February 2005. [2] J.B. Kuo, et al, IEEE Trans. Electron Dev, vol. 50, no. 12, pp. 2559- 2564 DECEMBER 2003. [3] M.Jagadesh Kumar, et al, IEEE Trans. Electron Dev, vol. 53, no. 4, pp. 706- 711 ,APRIL 2006.

P4-S5.4
Modeling the Impurity Influence on the Separation Work of Interfaces. (#224) Robert Goldstein¹, Tariel Makhviladze², Mikhail Sarychev²; ¹Institute for Problems in Mechanics, Russian Academy of Science, Russian Federation ; ²Laboratory of Mathematical Modeling, Institute of Physics and Technology, Russian Academy of Science, Russian Federation.

In the present work the modeling of an influence of lattice defects on adhesion characteristics of interfaces between two joined materials is performed. We found and analyzed the dependence of the separation work of interfaces on defect concentrations in the joined materials. The results can be used to monitor the strength properties of interfaces. The general model for calculation of the dependences of the separation work on the presence of lattice microdefects in the materials is developed. The model is based on a thermodynamical approach dealing with the Gibbs equation and the Legendre transformation of this equation. The approach is analogous to one that was used in [1] for description of the interfacial separation work, when adsorption of an environment on the forming free surfaces of the joined materials takes place. We applied the model to the case when defects are impurities or vacancies, the limiting regime corresponding to so-called "slow" separation being considered. In this regime the chemical potentials of the defects remain constant. As for impurity influence the cases of interstitial and substitutional impurities are considered in detail. In the first case the two-component Gibbs equation can be used. The solution for the separation work as a function of the impurity concentrations is derived and analyzed. The conditions are found when the separation work is monotonic or it has a maximum, a minimum or a saddle point. A possibility is studied when the separation work can be reduced to zero and becomes negative if it is positive in the absence of the impurity. In the second case (substitutional impurities) it is necessary to use the four-component Gibbs equation because the presence of impurity atoms changes the local concentration of the lattice atoms. However, accounting for the Dugem equation for the impurity and lattice atoms one can reduce the initial Gibbs equation in the two-component one with the renormalized impurity concentrations at the interface. Thus the solution for the separation work is derived in the similar manner as for the interstitial impurity case. It is shown that there is also a possibility that the separation work can become negative at a sufficient impurity concentration in one of the materials. The same result are also obtained in the work for vacancies. For the both impurities and vacancies the estimates are carried out. These estimates show that the necessary conditions, under which addition of defects reduces the interface separation work up to zero, strongly depend on temperature and can be fulfilled if the free material surface is a more good impurity absorber than the interface. [1] Rice J.R. Hydrogen and interfacial cohesion. In: Effect of hydrogen on behavior of materials, ed. by A.W. Thompson and I.M. Bernstein (The metallurgic society of AIME, New York, 1975), p.455.

P4-S5.5
Etching Mechanisms of ZrO₂ Thin Films in BCl₃/Cl₂ Plasma. (#1111) Cheol-In Lee, Gwan-Ha Kim, Dong-Pyo Kim, Jong-Chang Woo, Chang-Il Kim; School of Electrical Electronics Engineering, Chung-Ang University, Republic of Korea.

As feature size of CMOS device has been decreased 100 nm, the new material has required to substitute for SiO2 as gate dielectric material. The silicon oxide for gate reached a physical limit owing to very high gate leakage current of 10 A/cm2 for very thin gate SiO2 of below 1nm. Therefore, high dielectric constant materials, such as HfO2, ZrO2, and Al2O3 have attracted a great attention. Among them, ZrO2 is the most candidate because of its high dielectric constant of 20 ~ 25, wide bandgap of 5~7 eV, and thermal stability with Si. In order to obtain a small feature accurate pattern transfer, development of plasma etching process for ZrO2 thin film is important problem to be solved. There are few papers on the etch of ZrO2 thin films with using helical resonator plasma and electron cyclotron plasma in Cl2/BCl3. They reported that etch rate of ZrO2 is limited by the low volatile etch by product such as ZrCl2, but the etch rate can be accelerated by the addition BCl3 which can be effectively remove oxygen from the surface of ZrO2 [1]. However, there is no relationships between input parameters and plasma chemistry as well as surface reactions. M.S. Kim et al reported etch mechanism of BCl3/Ar plasma using inductively coupled plasma. In present work, the etching characteristics of ZrO2 thin film was investigated with using inductively coupled BCl3/Cl2 plasma. ZrO2 thin film was deposited on Si substrate by atomic layer deposition (ALD). The variation of etch rate was monitored while additive gases was varied in BCl3/Cl2 plasma. Simultaneously, the etch behavior of ZrO2 was investigated with variation of RF power, DC bias voltage, and pressure. The fixed input parameters were total pressure of BCl3/Cl2/(Ar or N2) mixture of 15 mTorr, total gas flow rate of 20 sccm, input power of 700 W, dc bias voltage of - 150 V and substrate temperature of 40 oC. To understand the influence of additive Ar or N2 into BCl3/Cl2 on the electron temperature and the density of radicals, Langmuir probe (LP) and optical emission spectroscopy (OES) was used during etching process. [1] M.S. Kim, N.K. Min, S.J, Yun, H.W. Lee, A. Efremov, K.H. Kwon, Microelec. Eng. 85 (2008) 348.

P4-S5.6
Low-Temperature Preparation of Ba_xSr_1-xTiO₃ Thin Films Grown on Flexible Substrate. (#819) Jinbao Xu,

Nanocrystalline Barium strontium titanate(BaxSr1-xTiO3) thin films have been firstly at low processing temperature on flexible substrates by using sol-gel process and hydrothermal(SGHT) technique, Which combined the conventional sol-gel process and hydrothermal method. The as-dried BaxSr1-xTiO3 gel films were used as the precursor films for the post-hydrothermal treament. The microstructural characteristics proved that the prepared BaxSr1-xTiO3 thin films with well-developed crystallinity and good surface morphology were converted from the amorphous phase to the perovskite phase at very low processing of 100-200?.

P4-S5.7
Conformal Self-Organized Hf Silicide Nanodots and Its Field Emission Properties. (#264) Kun Xue, Jian-Bin Xu, Jin An, Ho Po Ho; The Chinese University of Hong Kong, Hong Kong.

Self-organized Hf silicide nanodots are in-situ fabricated by annealing of ultrathin HfOx (~2nm) on Si(111) substrate. Investigations by ultrahigh vacuum scanning tunneling microscopy (UHV-STM) and atomic force microscopy (AFM) show that two distinct sets of nanodots are formed with an average diameter of about 60nm and 5nm, and an average height of 20nm and 2nm, respectively. The area density is about 1010/cm2. The formation mechanism of the two sets of nanodots is ascribed to the interaction of the HfOx thermal decomposition and the Oswald ripen of the Hf silicide nanodots. X-ray photoemission spectroscopy (XPS) results show that the composition of the nanodots is largely Hf silicide, while the exact stoichiometry is not well identified. Field emission measurements show a low emission threshold field and typical two regions of emission characteristics in the low and high field regions.

9:00 AM *P5-S1.1 (invited)
Composition and Structure of High-K Materials on New Channel Materials. (#1278) Hang Dong Lee, Tian Feng, Lyudmila Goncharova, Eric Garfunkel, Torgny Gustafsson; Departments of Physics and Astronomy, Rutgers University, Piscataway, New Jersey, USA.

Advanced CMOS research has recently turned its attention to higher mobility substrate materials. We have examined a series of different III-V and Ge-based gate stack structures focusing on passivation, high-K growth, and gate metallization and thermal stability. By combining medium energy ion scattering (MEIS) and x-ray photoelectron (XPS) we have investigated the diffusion of various species, including sulfur, oxygen and nitrogen, as well as the semiconductor and metal components, in the stack and at the interfaces. MEIS is best thought of as a high resolution, low energy version of conventional Rutherford backscattering with a depth resolution of ~ 3 Å. As the ion-solid interaction law is known accurately in the ion energy range we use, detailed modeling of the spectra can be performed. XPS gives information about electronic states and complementary structural information. In this report we focus on a few selected systems, one of which is InGaAs. We have explored sulfur passivation using (NH₄)₂S prior to high-K deposition to help ensure that the starting surface has a low defect concentration. We have explored both low and high In concentration substrates, with a In/(In+As) ratio of between 0.1-0.5. Our results show that when the dielectric is gown, S incorporates first close to the dielectric/semiconductor interface. From a thermodynamic perspective this is not unexpected. Although S bonds to the metal and semiconductor more weakly than O, with metal and/or semiconductor present in excess, the S can readily incorporate into the film rather than "float" on top during growth as a surfactant. After metallization by Al, S remains incorporated in the film but moves up in the film close to the metal electrode (and/or incorporates into the Al at the interface) forming a sulfide or oxysulfide layer. Although one might have assumed that metallization would have no effect on S or O located 1-3 nm away in the dielectric, there was net S movement up in the film (as has also been observed for O in the past, driven by the high oxygen affinity of many electrode metals, such as Al, Ti or Ru). The movement of S was confirmed with XPS studies. We will also compare S passivation of III-V/high-K gate stacks with analogous work on Ge and with N passivation routes. This work was supported by the SRC, Sematech and NSF, and performed in collaboration with Niti Goel, Safak Sayan, Prashant Majhi and Wilman Tsai, Intel.

9:30 AM *P5-S1.2 (invited)
Nanoanalysis of High-K Dielectrics. (#724) Alan James Craven, Department of Physics and Astronomy, University of Glasgow, United Kingdom.

Si-based dielectrics on a Si substrate have allowed tremendous progress in MOSFET performance both because they satisfy a large number of essential criteria and because the industry has a wealth of experience of using them in design and fabrication. Now scaling is becoming limited by their relatively low permittivity. The high-k dielectrics being investigated to replace them undergo complex physical and chemical changes during deposition and processing. The target dimensions are such that interfaces play a key role in performance. This becomes even more important when Si is replaced by a III-V semiconductor where it is necessary to ensure that the Fermi level at the dielectric-semiconductor interface is unpinned. Some of the phenomena can be investigated using transmission electron microscopy (TEM) techniques. Combining the small electron probe available in the scanning transmission electron microscope (STEM) with spectroscopy techniques, particularly electron energy loss spectroscopy (EELS), has given rise to spectrum imaging. Here one or more spectra are recorded at each pixel of an array. In EELS, the edge positions and intensities give the composition while the electron energy loss near edge structure (ELNES) on the edges gives the local chemistry. If the low loss region of the spectrum can recorded at the same pixel then corrections can be made for diffraction contrast, multiple scattering and thickness to give absolute numbers of atoms per unit volume. Aberration corrected STEM has achieved true atomic resolution high angle annular dark field (HAADF) imaging. Combining aberration correction with spectrum imaging can give analytical information with this resolution. Such techniques provide a range of information demonstrating effects such as such phase separation, composition gradients, interface reactions and grain boundary reactions. However, spatial resolution is affected by specimen thickness, because the beam spreads as it propagates through the specimen, and also by the roughness of the interfaces, because of the projection effect. The former is a challenge for TEM specimen preparation whereas the latter is a challenge for high-k preparation as many of the interfaces studied have significant roughness relative to the scale of the proposed devices. Nonetheless, it is possible to extract some high spatial resolution information about an interface despite its roughness.

10:00 AM P5-S1.3
2D and 3D Characterization of ZrO₂ Thin Films Deposited by MOCVD for High-Density 3D Capacitors. (#1101) Magali Brunet¹, Gerald Leclerc¹, Karolina Galicka-Fau², Emmanuel Scheid¹, Michel Andrieux², Corinne Legros², Isabelle Gallet², Michaele Herbst²; ¹Laboratoire d'Analyse et d'Architecture des Systèmes, Centre National de la Recherche Scientifique, LAAS-CNRS, Université de Toulouse, France ; ²LEMHE-CNRS, Université de Paris Sud, France.

The presented work deals with high-density integrated capacitors for output filters in future micro DC-DC converters. In low power portable applications, integrated passive components are necessary to produce miniaturized systems. When talking about integrated capacitors, the current solutions on silicon (MOS or MIM) are not able to produce the capacitance values required for 1W DC-DC converter: more than 1uF/mm?. To increase the capacitance density, the first approach is to work on the capacitor geometry: reduced dielectric thickness and maximised electrodes area. The second approach concerns the use of a high-k dielectric. In the presented work, we are combining these two approaches. 3D capacitors structures were realised with deep cavities network etched by DRIE in a high conductivity silicon substrate. The SiO₂/Si₃N₄ standard dielectric [1] was replaced by ZrO₂ (k =25- 40). The ZrO₂ films (about 100 nm) were deposited by liquid injection MOCVD from Zr2(OiPr)6(thd)2. The following deposition parameters were studied: oxygen flow (0.05-0.1 l/min), substrate temperature (450?C-550?C), injection frequency (0.5-2 Hz), pressure (1-1000 Pa). The difficulty laid on the necessity to obtain at the same time uniform films (without cracks), good stoichiometry without carbon contaminants and good coverage in the deep silicon cavities. The stoichiometry and carbon contaminant were controlled by XPS, FTIR and SIMS. The ZrO₂ thickness was measured by ellipsometry and by SEM on the cross-section of the cavities. The ZrO₂ films deposited on silicon (100) were first characterized structurally by XRD. The films were constituted of a mixture of tetragonal and monoclinic phases. The deposition parameters were varied in order to promote the tetragonal phase (permittivity reported around 40 [2]). Low oxygen flow (0.05 l/min), low temperature (450?C), low injection frequency (0.5 Hz), low pressure (< 100 Pa) provided films with a predominant tetragonal phase. In parallel, the 3D coverage was observed in cavities with different depths (from 10 to 30 um) and widths (from 2 to 8 um). The thickness evolution was plotted versus the cavity aspect ratio (depth/width). It was shown that the ZrO₂ thickness decreased to 20% - 30% of its surface value when the aspect ratio of the cavity was 2. For aspect ratio higher than 2, the thickness decreased only slightly. Electrical characterization of the ZrO₂ films were done on two types of substrates: low resistivity Si (0.2 Ohm.cm) and Pt/Ti/SiO₂/Si. The I(V), C(V) and C(frequency) characteristics for different deposition parameters allowed the evaluation of the leakage current (< 10e-6 A.cm-2), the permittivity (around 25), the breakdown voltage (300 kV/cm). These dielectric properties combined with 3D deposition will allow the realisation of very high-density capacitors. [1] M. Brunet et al., Micromach. and Microfab. Proc. Techno. XI, SPIE MOEMS-MEMS Symp., 2006. [2]. C. Chen et al., Surf. and Coat. Techn, 167, p. 245 (2003)

MORNING BREAK 10:30 AM - 11:00 AM

11:00 AM P5-S2.1
Ferroelectric Ag(Ta,Nb)O₃ and (Na,K)NbO₃ Films Microwave Varactors. (#872) Jang Yong Kim, Alexander M Grishin; Department of Condensed Matter Physics, Royal Institute of Technology, Kista, Sweden.

We present comparative characteristics of microwave voltage tunable capacitors (varactors) fabricated on Ag(Ta,Nb)O3 (ATN), (Na,K)NbO3 (NKN), (Ba,Sr)TiO3 (BST) and Pb(Zr,Ti)O3 ferroelectric films grown by rf-magnetron sputtering and pulsed laser deposition techniques on the sapphire (r-cut Al203), quartz (Y+36°-cut), LaAlO3(001) and Nd:YAlO3(001) single crystals. Two port 2 &mum finger gap coplanar waveguide interdigital capacitors (CPWIDCs) were defined on ferroelectric films surface by photolithographic lift-off technique. De-embedding method was employed to extract properties of CPWIDC from the S parameters measured in microwave range up to 40 GHz. It enables a trustworthy determination of the ferroelectric properties without being corrupted by parasitic impedance and admittance of coplanar transmission line. BST films on sapphire substrates show superior tunability of 26% (20 GHz, 200 kV/cm), whereas ATN films possess the lowest tan &delta = 0.06 at 20 GHz and extremely low dispersion of 4.3% in a whole frequency range of 45 MHz - 40 GHz. Controlling Nb:Ta concentration ratio, microwave properties of ATN system were tailored towards low loss, high tunability and low frequency dispersion.

11:15 AM P5-S2.2
Atomic Layer Deposition of SrTiO₃ Thin Films at High Temperature (370 C). (#941) Sang Woon Lee, Jeong Hwan Han, Cheol Seong Hwang; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, Seoul National University, Republic of Korea.

SrTiO3 (STO) thin film is a highly desirable material as a capacitor dielectric in dynamic random-access memory (DRAMs) with a design rule < 40nm because of its high dielectric constant and low leakage current. Atomic layer deposition (ALD) technique, which is characterized by its unique self-limiting deposition mechanism, is necessary for the dielectric films considering the severe 3D structure of the DRAM capacitors. Although the ALD of STO thin films has been reported previously,[1] the lower growth temperature (~ 250oC) resulted in the lower density films which in turn degraded the various electrical properties. STO thin films were deposited on Ru/SiO2/Si substrate by ALD at a higher temperature (370oC) in order to improve the crystallinity and density of the films using Ti(O-iPr)2(tmhd)2 and Sr(tmhd)2 as Ti-, and Sr-precursors, respectively, and H2O as the oxidant. The thermal decomposition temperatures of these Ti- and Sr-precursors under the given ALD conditions were found to be ~ 390 and 400 oC, respectively. ALD process conditions of the TiO2 and STO films were confirmed by the saturated growth behaviors. The saturated growth rate was 0.025 and 0.017 nm/cycle for TiO2 and STO, respectively. SrO growth rate was very low suggesting the inactive chemical reaction between the Sr(tmhd)2 and H2O. However, Sr-O layer was successfully grown on top of the pre-adsorbed Ti-O layer. It appears that the Ti-O layer catalyzes the Sr-O growth reaction. Interestingly, Sr-O layer slowed down the growth of Ti-O layer on top compared to the Ti-O growth on the Ti-O layer. This was confirmed from the fact that the incorporated amount of Ti in STO was decreased with the increasing Sr-precursor feeding time for the given amount of Ti feeding whereas the incorporated amount of Sr in STO was increased with the increasing Ti-precursor feeding time for the given amount of Sr feeding. However, the STO films grown directly on the Ru electrode were not in-situ crystallized in spite of the increased growth temperature. To further improve the crystallinity of the film for achieving the better electric properties, thin (3 nm-thick) crystallized STO layer was deposited (deposition followed by post annealing at 700oC) as a seed layer and main STO layer (~ 17 nm) was deposited. With the help of the seed-layer, well-crystallized STO film was obtained even at the as-deposited state which was confirmed by HRTEM. (100) preferred growth orientation was observed by X-ray diffraction. The process condition of seed layer has a large influence on the in-situ crystallization of the main STO layer. From a planar capacitor structure consisting of Pt/20-nm-thick STO/Ru(bottom) oxide equivalent thickness of 0.72 nm (dielectric constant of 108) and a low leakage current density (~10-7 A/cm2 at 0.8V) were achieved. Therefore, it can be concluded that achieving the well-crystallized STO film at the as-deposited state is crucial for achieving the low leakage current. For the analysis of the conduction mechanism of Ru/STO interface, the leakage currents were measured as a function of temperature and voltage. The Fowler-Nordheim tunneling appeared as the primary conduction mechanism at the high electric field region (>0.5MV/cm), whereas the Schottky conduction components mainly contributed to the conduction process at the low electric fields. The extracted Schottky barrier height of Ru/STO interface was 0.47eV. [1] O. S. Kwon, S. W. Lee, J. H. Han, C. S. Hwang, J. Electrochem. Soc., 154(6) G127-133 (2007).

11:30 AM P5-S2.3
Bi2 (Zn2/3Nb4/3)O7 Ceramics and Thin Films As a Possible High -K Microwave Dielectrics for Electronics Application. (#923) K Sudheendran, K. C. James Raju, Mohan Jacob; James Cook University, Brisbane, Queensland, India.

Due to the rapid development of today's electronics and information technology there is a great demand for high K dielectric materials. This has prompted development and optimization of new high K dielectric materials themselves and their related processing technology in the form of thin films and their appropriate characterizations. Bi2Zn2/3Nb4/3O7 (m-BZN) with a monoclinic zirconolite like structure with large ?l ~ 70 and low loss is recently attracted many researchers. The microwave dielectric properties of Bi2Zn2/3Nb4/3O7 ceramics and thin films will be presented. Ceramics samples were prepared by solid state reaction from the respective high purity oxide powders. The microwave dielectric properties of this ceramic were measured up to cryogenic temperatures using Dielectric Post (DP) resonator techniques. M-BZN films were deposited on to fused silica substrate by Pulsed Laser Deposition (PLD) using a KrF excimer laser (248nm wavelength). These films were characterized for structure by X-ray diffraction and for microstructure by atomic force microscope in the tapping mode. The microwave dielectric properties of these films were measured at 10GHz using a split post dielectric resonator technique. The dielectric permittivity of the m-BZN is increasing from 63 at 15K to 69 at a temperature of 294K. The high dielectric permittivity together with the low sintering temperature will make this material an attractive candidate for LTCC applications. The as deposited films were amorphous and were crystallized on annealing at 600?C in air. The microstructure and microwave dielectric properties of these films were found to be depending on the processing conditions. The films processed at 2 mTorr of oxygen pressure at the process chamber exhibits a dielectric constant of 48 where as the film deposited at 10 mTorr exhibits a dielectric constant of 59. Due to their attractive dielectric properties, these thin films can be used for capacitor applications in various electronics circuits as well in microwave electronics.

11:45 AM P5-S2.4
Dielectric, Ferroelectric and Electrical Properties of Acceptor and Donor Doped Bismuth Titanate Ceramics. (#254) Jin Soo Kim, Saes Byul Kim, Byung Chun Choi, Jung Hyun Jeong, Hae Jun Lee, Ill Won Kim; Pukyong National University, Republic of Korea.

For the nonvolatile ferroelectric random access memory (Nv-FeRAM) and piezoelectric devices, the ferroelectric and electrical properties of bismuth layer structured ferroelectrics (BLSF) have been extensively investigated. To investigate the effects of ion doping on Bi4Ti3O12 based system, (Bi, A)4(Ti, B)3O12 (A = La, Nd, B = Nb, V, W, Fe) ferroelectric ceramics with acceptor and donor doping were prepared by a solid state-reaction method. The prepared powders were mixed by ball milling with ethanol for 24 h and dried. Finally, the pressed pallets were sintered at the temperature of 1050 oC ~ 1100 oC. Then the XRD pattern of crystallized ceramics is similar to that of BIT ceramics. With the increase of ion doping on A and B-sites, the Curie temperature decreased and the dielectric constant peak broadened. One of them, the Bi4-xNdxTi3O12 (BNdT) ceramics with Nd doping in A-site have maximum remanent polarization (Pr=10 ?C/cm2) at x = 0.8, which is higher than that of BIT ceramics (Pr=5 ?C/cm2). In addition, small Nd/Nb and Nd/V co-doping in A/B-sites decreased the electrical conductivity and increased the remanent polarization (Pr=16 ?C/cm2), which indicates that the ceramics have a good ferroelectric properties. In this work, the effects of ion doping on ferroelectric and electrical properties were investigated by a XRD, SEM, dielectric constant, ferroelectric P-E hysteresis loop and electrical conductivity measurements.